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CODES
2004
IEEE
15 years 1 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
COOPIS
2004
IEEE
15 years 1 months ago
Composing Mappings Between Schemas Using a Reference Ontology
Large-scale database integration requires a significant cost in developing a global schema and finding mappings between the global and local schemas. Developing the global schema r...
Eduard C. Dragut, Ramon Lawrence
CASES
2006
ACM
15 years 1 months ago
Improving the performance and power efficiency of shared helpers in CMPs
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi...
DFT
2004
IEEE
78views VLSI» more  DFT 2004»
15 years 1 months ago
Reliability Modeling and Assurance of Clockless Wave Pipeline
This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...
T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lomb...
CIBCB
2006
IEEE
15 years 1 months ago
Efficient Probe Selection in Microarray Design
Abstract-- The DNA microarray technology, originally developed to measure the level of gene expression, had become one of the most widely used tools in genomic study. Microarrays h...
Leszek Gasieniec, Cindy Y. Li, Paul Sant, Prudence...
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