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DFT
2004
IEEE
94views VLSI» more  DFT 2004»
15 years 11 months ago
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
175
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ITC
2003
IEEE
93views Hardware» more  ITC 2003»
16 years 28 days ago
On Reducing Test Data Volume and Test Application Time for Multiple Scan Chain Designs
Huaxing Tang, Sudhakar M. Reddy, Irith Pomeranz
ISCAS
2002
IEEE
85views Hardware» more  ISCAS 2002»
16 years 17 days ago
Automated test development and test time reduction for RF subsystems
Sule Ozev, Alex Orailoglu, Hosam Haggag
GLVLSI
2002
IEEE
98views VLSI» more  GLVLSI 2002»
16 years 18 days ago
Minimizing concurrent test time in SoC's by balancing resource usage
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
Dan Zhao, Shambhu J. Upadhyaya, Martin Margala
ERSHOV
2003
Springer
16 years 26 days ago
Integration of Functional and Timed Testing of Real-Time and Concurrent Systems
The article presents an approach to model based testing of complex systems based on a generalization of finite state machines (FSM) and input output state machines (IOSM). The app...
Victor V. Kuliamin, Alexandre Petrenko, Nick V. Pa...