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DATE
2009
IEEE
78views Hardware» more  DATE 2009»
16 years 20 days ago
QC-Fill: An X-Fill method for quick-and-cool scan test
— In this paper, we present an X-Fill (QC-Fill) method for not only slashing the test time but also reducing the test power (including both capture power and shifting power). QC-...
Chao-Wen Tzeng, Shi-Yu Huang
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
16 years 7 days ago
Toward a scalable test methodology for 2D-mesh Network-on-Chips
1 This paper presents a BIST strategy for testing the NoC interconnect network, and investigates if the strategy is a suitable approach for the task. All switches and links in the ...
Kim Petersén, Johnny Öberg
ICSE
2005
IEEE-ACM
16 years 6 months ago
A framework of greedy methods for constructing interaction test suites
Greedy algorithms for the construction of software interaction test suites are studied. A framework is developed to evaluate a large class of greedy methods that build suites one ...
Charles J. Colbourn, Myra B. Cohen, Renée C...
TIT
2011
157views more  TIT 2011»
15 years 25 days ago
Decentralized Sequential Hypothesis Testing Using Asynchronous Communication
—An asymptotically optimum test for the problem of decentralized sequential hypothesis testing is presented. The induced communication between sensors and fusion center is asynch...
Georgios Fellouris, George V. Moustakides
ET
2002
72views more  ET 2002»
15 years 5 months ago
Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor
Abstract. A novel approach for using an embedded processor to aid in deterministic testing of the other components of a system-on-a-chip (SOC) is presented. The tester loads a prog...
Abhijit Jas, Nur A. Touba