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DATE
2003
IEEE
96views Hardware» more  DATE 2003»
15 years 11 months ago
Test Data Compression: The System Integrator's Perspective
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola N...
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
15 years 9 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
VTS
1996
IEEE
114views Hardware» more  VTS 1996»
15 years 10 months ago
Quantitative analysis of very-low-voltage testing
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is o...
Jonathan T.-Y. Chang, Edward J. McCluskey
IPPS
2007
IEEE
16 years 7 days ago
Period-Dependent Initial Values for Exact Schedulability Test of Rate Monotonic Systems
Real-time systems using Rate Monotonic fixed priority scheduling can be checked for schedulability either by pessimistic schedulability conditions or exact testing. Exact testing ...
Wan-Chen Lu, Kwei-Jay Lin, Hsin-Wen Wei, Wei Kuan ...
SODA
2010
ACM
219views Algorithms» more  SODA 2010»
16 years 3 months ago
Algorithms and Complexity for Periodic Real-Time Scheduling
We investigate the preemptive scheduling of periodic tasks with hard deadlines. We show that, even in the uniprocessor case, no polynomial time algorithm can test the feasibility ...
Vincenzo Bonifaci, Ho-Leung Chan, Alberto Marchett...