Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola N...
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is o...
Real-time systems using Rate Monotonic fixed priority scheduling can be checked for schedulability either by pessimistic schedulability conditions or exact testing. Exact testing ...
We investigate the preemptive scheduling of periodic tasks with hard deadlines. We show that, even in the uniprocessor case, no polynomial time algorithm can test the feasibility ...
Vincenzo Bonifaci, Ho-Leung Chan, Alberto Marchett...