193 search results - page 6 / 39 » The TigerSHARC DSP Architecture |
DAC
1996
ACM
15 years 3 months ago
1996
ACM
The testability of basic DSP datapath structures using pseudorandom built-in self-test techniques is examined. The addition of variance mismatched signals is identified as a testi...
ISCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
—This paper describes a low-power DSP architecture for use in cochlear implants. The microsystem, fabricated in
ASPDAC
2005
ACM
15 years 29 days ago
2005
ACM
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
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ISSS
1995
IEEE
15 years 2 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
DAC
1995
ACM
15 years 2 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...