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» The Underlying Logic of Hoare Logic
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LICS
1990
IEEE
15 years 2 months ago
Normal Process Representatives
This paper discusses the relevance of a form of cut elimination theorem for linear logic tensor theories to the concept of a process on a Petri net. We base our discussion on two ...
Vijay Gehlot, Carl A. Gunter
JAIR
2012
211views Hardware» more  JAIR 2012»
13 years 13 days ago
Reformulating the Situation Calculus and the Event Calculus in the General Theory of Stable Models and in Answer Set Programming
Circumscription and logic programs under the stable model semantics are two wellknown nonmonotonic formalisms. The former has served as a basis of classical logic based action for...
Joohyung Lee, Ravi Palla
DAC
1998
ACM
15 years 11 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
SIGMOD
2006
ACM
156views Database» more  SIGMOD 2006»
15 years 10 months ago
Data delivery in a service-oriented world: the BEA aquaLogic data services platform
"Wow. I fell asleep listening to SOA music, and when I woke up, I couldn't remember where I'd put my data. Now what?" Has this happened to you? With the new pu...
Michael J. Carey
DATE
2009
IEEE
145views Hardware» more  DATE 2009»
15 years 4 months ago
Joint logic restructuring and pin reordering against NBTI-induced performance degradation
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing significant loss on circuit performance and lifetime, has become a critical challenge for temporal re...
Kai-Chiang Wu, Diana Marculescu