Sciweavers

12334 search results - page 2318 / 2467
» The Use of C
Sort
View
CODES
2007
IEEE
15 years 4 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
CODES
2007
IEEE
15 years 4 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 4 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
HPDC
2007
IEEE
15 years 4 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
ICC
2007
IEEE
124views Communications» more  ICC 2007»
15 years 4 months ago
On Achieving Maximum Network Lifetime Through Optimal Placement of Cluster-heads in Wireless Sensor Networks
—In a wireless sensor network, the network lifetime is an important issue when the size of the network is large. In order to make the network scalable, it is divided into a numbe...
Marudachalam Dhanaraj, C. Siva Ram Murthy
« Prev « First page 2318 / 2467 Last » Next »