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DATE
2008
IEEE
155views Hardware» more  DATE 2008»
15 years 4 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...
IPPS
2007
IEEE
15 years 4 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
ISCAS
2007
IEEE
90views Hardware» more  ISCAS 2007»
15 years 4 months ago
Leakage-Aware Design of Nanometer SoC
– In the sub-65 nm CMOS technologies, subthreshold and gate dielectric leakage currents need to be simultaneously suppressed for effective energy reduction. New low-leakage circu...
Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu
DATE
2006
IEEE
134views Hardware» more  DATE 2006»
15 years 4 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
ISCAS
2005
IEEE
190views Hardware» more  ISCAS 2005»
15 years 3 months ago
Digital VLSI OFDM transceiver architecture for wireless SoC design
—This paper presents the VLSI architecture of an OFDM baseband transceiver for wireless communications. The open-/closed-loop carrier recovery achieves the stepping frequency acq...
Wei-Hsiang Tseng, Ching-Chi Chang, Chorng-Kuang Wa...