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FCCM
2000
IEEE
148views VLSI» more  FCCM 2000»
15 years 2 months ago
An Adaptive Cryptographic Engine for IPSec Architectures
Architectures that implement the Internet Protocol Security (IPSec) standard have to meet the enormous computing demands of cryptographic algorithms. In addition, IPSec architectu...
Andreas Dandalis, Viktor K. Prasanna, José ...
ARC
2008
Springer
155views Hardware» more  ARC 2008»
14 years 11 months ago
Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems
As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable archite...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
ERSA
2009
185views Hardware» more  ERSA 2009»
14 years 7 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
DDECS
2009
IEEE
171views Hardware» more  DDECS 2009»
15 years 4 months ago
Packet header analysis and field extraction for multigigabit networks
—Packet header analysis and extraction of header fields needs to be performed in all network devices. As network speed is increasing quickly, high speed packet header processing...
Petr Kobierský, Jan Korenek, Libor Polcak
NOCS
2007
IEEE
15 years 4 months ago
Fast, Accurate and Detailed NoC Simulations
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
Pascal T. Wolkotte, Philip K. F. Hölzenspies,...