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IPPS
1996
IEEE
15 years 9 months ago
A Parallel Algorithm for Minimization of Finite Automata
In this paper, we present a parallel algorithm for the minimization of deterministic finite state automata (DFA's) and discuss its implementation on a connection machine CM-5...
Bala Ravikumar, X. Xiong
DAC
1996
ACM
15 years 9 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
SIGCOMM
1996
ACM
15 years 9 months ago
Measuring the Performance of Communication Middleware on High-Speed Networks
Conventional implementations of communication middleware (such as CORBA and traditional RPC toolkits) incur considerable overhead when used for performance-sensitive applications ...
Aniruddha S. Gokhale, Douglas C. Schmidt
ASAP
2004
IEEE
185views Hardware» more  ASAP 2004»
15 years 8 months ago
Families of FPGA-Based Algorithms for Approximate String Matching
Dynamic programming for approximate string matching is a large family of different algorithms, which vary significantly in purpose, complexity, and hardware utilization. Many impl...
Tom Van Court, Martin C. Herbordt
ISQED
2010
IEEE
126views Hardware» more  ISQED 2010»
15 years 6 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...