In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
K. Van Renterghem, P. Demuytere, Dieter Verhulst, ...
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
This paper introduces a method and tool-support for the automatic analysis and verification of hybrid and embedded control systems, whose continuous dynamics are often modelled u...
Andreas Bauer 0002, Markus Pister, Michael Tautsch...
Abstract— As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing...
Zhuo Li, Cliff C. N. Sze, Charles J. Alpert, Jiang...
Until now, system administrators have lacked a flexible real-time network traffic flow monitoring package. Such a package must provide a wide range of services but remain flexible ...
David Moore, Ken Keys, Ryan Koga, Edouard Lagache,...