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2008
IEEE
15 years 10 months ago
Redistribution aware two-step scheduling for mixed-parallel applications
— Applications raising in many scientific fields exhibit both data and task parallelism that have to be exploited efficiently. A classic approach is to structure those applica...
Sascha Hunold, Thomas Rauber, Frédér...
CCECE
2006
IEEE
15 years 10 months ago
A Software Defined Radio Receiver Architecture for UWB Communications and Positioning
A software defined radio (SDR) receiver architecture is proposed in this paper for ultra-wideband (UWB) applications. Both UWB data communication and positioning functions are imp...
Yanyang Zhao, Ligen Wang, Jean-François Fri...
ESCIENCE
2005
IEEE
15 years 9 months ago
The Common Instrument Middleware Architecture: Overview of Goals and Implementation
— Instruments and sensors and their accompanying actuators are essential to the conduct of scientific research. In many cases they provide observations in electronic format and ...
Tharaka Devadithya, Kenneth Chiu, Kianosh Huffman,...
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
15 years 9 months ago
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
Haitao Du, Marcos Sanchez-Elez, Nozar Tabrizi, Nad...
FPL
2006
Springer
108views Hardware» more  FPL 2006»
15 years 7 months ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood