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HPCA
2009
IEEE
15 years 10 months ago
iCFP: Tolerating all-level cache misses in in-order processors
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
Andrew D. Hilton, Santosh Nagarakatte, Amir Roth
VLSID
2008
IEEE
166views VLSI» more  VLSID 2008»
15 years 10 months ago
Exploring the Processor and ISA Design for Wireless Sensor Network Applications
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
Shashidhar Mysore, Banit Agrawal, Frederic T. Chon...
VLSID
2004
IEEE
209views VLSI» more  VLSID 2004»
15 years 10 months ago
An Architecture for Motion Estimation in the Transform Domain
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, ...
STOC
2005
ACM
135views Algorithms» more  STOC 2005»
15 years 10 months ago
On the bias of traceroute sampling: or, power-law degree distributions in regular graphs
Understanding the graph structure of the Internet is a crucial step for building accurate network models and designing efficient algorithms for Internet applications. Yet, obtaini...
Dimitris Achlioptas, Aaron Clauset, David Kempe, C...
MOBISYS
2007
ACM
15 years 9 months ago
Context-for-wireless: context-sensitive energy-efficient wireless data transfer
Ubiquitous connectivity on mobile devices will enable numerous new applications in healthcare and multimedia. We set out to check how close we are towards ubiquitous connectivity ...
Ahmad Rahmati, Lin Zhong