145 search results - page 9 / 29 » The use of random simulation in formal verification |
JCST
2010
14 years 5 months ago
2010
Probabilistic techniques are widely used in the analysis of algorithms to estimate the computational complexity of algorithms or a computational problem. Traditionally, such analys...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Despite the growing research effort in formal verification, constraint-based random simulation remains an integral part of design validation, especially for large design componen...
SAFECOMP
1998
Springer
15 years 1 months ago
1998
Springer
A method is described for the analysis and the verification of safety in software systems. The method offers a formal notation for describing the software structure, the means for ...
ICFEM
2009
Springer
14 years 7 months ago
2009
Springer
Abstract. This paper shows how Ptolemy II discrete-event (DE) models can be formally analyzed using Real-Time Maude. We formalize in Real-Time Maude the semantics of a subset of hi...
DAC
2008
ACM
15 years 11 months ago
2008
ACM
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...