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» Thermal via placement in 3D ICs
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ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
14 years 2 days ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar
DAC
2007
ACM
14 years 7 months ago
Placement of 3D ICs with Thermal and Interlayer Via Considerations
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
Brent Goplen, Sachin S. Sapatnekar
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 3 months ago
Whitespace redistribution for thermal via insertion in 3D stacked ICs
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
Eric Wong, Sung Kyu Lim
ASPDAC
2007
ACM
164views Hardware» more  ASPDAC 2007»
13 years 10 months ago
Thermal-Aware 3D IC Placement Via Transformation
- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-...
Jason Cong, Guojie Luo, Jie Wei, Yan Zhang
ICCAD
2003
IEEE
118views Hardware» more  ICCAD 2003»
14 years 3 months ago
Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach
As the technology node progresses, thermal problems are becoming more prominent especially in the developing technology of three-dimensional (3D) integrated circuits. The thermal ...
Brent Goplen, Sachin S. Sapatnekar