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ASPLOS
2011
ACM
14 years 3 months ago
DoublePlay: parallelizing sequential logging and replay
Deterministic replay systems record and reproduce the execution of a hardware or software system. In contrast to replaying execution on uniprocessors, deterministic replay on mult...
Kaushik Veeraraghavan, Dongyoon Lee, Benjamin West...
EUROPAR
1999
Springer
15 years 4 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
15 years 5 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...
ISCA
2012
IEEE
218views Hardware» more  ISCA 2012»
13 years 2 months ago
CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures
Wide SIMD-based GPUs have evolved into a promising platform for running general purpose workloads. Current programmable GPUs allow even code with irregular control to execute well...
Minsoo Rhu, Mattan Erez
CISIS
2010
IEEE
15 years 6 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey