6111 search results - page 223 / 1223 » Time, Hardware, and Uniformity |
108
Voted
ASYNC
2005
IEEE
15 years 6 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
102
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ICCAD
2005
IEEE
15 years 9 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
75
Voted
ICCAD
2004
IEEE
15 years 9 months ago
2004
IEEE
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
100
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DATE
2003
IEEE
15 years 6 months ago
2003
IEEE
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
112
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DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
This paper addresses the problem of stochastic task execution time estimation agnostic to the process distributions. The proposed method is orthogonal to the application structure ...