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CW
2006
IEEE
15 years 3 months ago
Error Minimising Pipeline for Hi-Fidelity, Scalable Geospatial Simulation
The geospatial category of simulations is used to show how origin centric techniques can solve a number of accuracy related problems common to 3D computer graphics applications. P...
Chris Thorne
IPPS
1998
IEEE
15 years 1 months ago
Comparing the Optimal Performance of Different MIMD Multiprocessor Architectures
We compare the performance of systems consisting of one large cluster containing q processors with systems where processors are grouped into k clusters containing u processors eac...
Lars Lundberg, Håkan Lennerstad
ISCAPDCS
2001
14 years 11 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
DAC
1994
ACM
15 years 1 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
IPPS
2000
IEEE
15 years 2 months ago
Register Assignment for Software Pipelining with Partitioned Register Banks
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...
Jason Hiser, Steve Carr, Philip H. Sweany, Steven ...