821 search results - page 32 / 165 » Time Dependent Processing in a Parallel Pipeline Architectur... |
100
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TCAD
2002
14 years 9 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
101
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ICPP
1993
IEEE
15 years 1 months ago
1993
IEEE
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
MEMOCODE
2007
IEEE
15 years 4 months ago
2007
IEEE
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
DAC
1999
ACM
15 years 2 months ago
1999
ACM
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
COLING
1990
14 years 11 months ago
1990
A modular parallel distributed processing architecture for parsing, representing and paraphrasing sentences with multiple hierarchical relative clauses is presented. A lowel-level...