14360 search results - page 470 / 2872 » Time Modeling in MARTE |
128
Voted
ASPDAC
2007
ACM
15 years 9 months ago
2007
ACM
Communication exploration has become a critical step during SoC design. Researchers in the CAD community have proposed fast and efficient techniques for comprehensive design space ...
126
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CIKM
2010
Springer
15 years 3 months ago
2010
Springer
Pseudo-relevance feedback (PRF) improves search quality by expanding the query using terms from high-ranking documents from an initial retrieval. Although PRF can often result in ...
214
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ISCA
2012
IEEE
13 years 7 months ago
2012
IEEE
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
157
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ISPD
2010
ACM
15 years 12 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
140
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FORMATS
2006
Springer
15 years 8 months ago
2006
Springer
We consider interval measurement logic IML, a sublogic of Zhou and Hansen's interval logic, with measurement functions which provide real-valued measurement of some aspect of ...