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76
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DAC
1996
ACM
15 years 4 months ago
Innovative Verification Strategy Reduces Design Cycle Time for High-End Sparc Processor
Superscalar processor developers are creatively leveraging best-in-class design verification tools to meet narrow market windows. Accelerated simulation is especially useful owing...
Val Popescu, Bill McNamara
CPM
2006
Springer
175views Combinatorics» more  CPM 2006»
15 years 3 months ago
On-Line Linear-Time Construction of Word Suffix Trees
Abstract. Suffix trees are the key data structure for text string matching, and are used in wide application areas such as bioinformatics and data compression. Sparse suffix trees ...
Shunsuke Inenaga, Masayuki Takeda
DSD
2006
IEEE
83views Hardware» more  DSD 2006»
15 years 3 months ago
Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication
Abstract. Network-on-chip-based multiprocessor systems-onchip are considered as future embedded systems platforms. One of the steps in mapping an application onto such a parallel p...
Sander Stuijk, Twan Basten, Marc Geilen, Amir Hoss...
87
Voted
CEC
2005
IEEE
15 years 1 months ago
Equilibrium selection by co-evolution for bargaining problems under incomplete information about time preferences
Abstract- The main purpose of this work is to measure the effect of bargaining players’ information completeness on agreements in evolutionary environments. We apply Co-evolution...
Nanlin Jin
ICECCS
2010
IEEE
153views Hardware» more  ICECCS 2010»
15 years 2 days ago
Patterns for Modelling Time and Consistency in Business Information Systems
Abstract— Maintaining semantic consistency of data is a significant problem in distributed information systems, particularly those on which a business may depend. Our current wo...
Jeremy W. Bryans, John S. Fitzgerald, Alexander Ro...