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ET
2002
72views more  ET 2002»
15 years 17 days ago
Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor
Abstract. A novel approach for using an embedded processor to aid in deterministic testing of the other components of a system-on-a-chip (SOC) is presented. The tester loads a prog...
Abhijit Jas, Nur A. Touba
94
Voted
SDM
2008
SIAM
134views Data Mining» more  SDM 2008»
15 years 2 months ago
Direct Density Ratio Estimation for Large-scale Covariate Shift Adaptation
Covariate shift is a situation in supervised learning where training and test inputs follow different distributions even though the functional relation remains unchanged. A common...
Yuta Tsuboi, Hisashi Kashima, Shohei Hido, Steffen...
99
Voted
CORR
2010
Springer
104views Education» more  CORR 2010»
14 years 7 months ago
Designing Incentive Schemes Based on Intervention: The Case of Imperfect Monitoring
In this paper, we propose a class of incentive schemes based on intervention. We develop a general game-theoretic framework for the design of intervention schemes under imperfect m...
Jaeok Park, Mihaela van der Schaar
ITC
2000
IEEE
124views Hardware» more  ITC 2000»
15 years 5 months ago
Wrapper design for embedded core test
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
Yervant Zorian, Erik Jan Marinissen, Maurice Lousb...
121
Voted
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
15 years 6 months ago
Functional test generation using property decompositions for validation of pipelined processors
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
Heon-Mo Koo, Prabhat Mishra