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DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 3 months ago
Automatic ADL-based operand isolation for embedded processors
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
Anupam Chattopadhyay, B. Geukes, David Kammler, Er...
RTSS
2000
IEEE
15 years 2 months ago
Scalable Real-Time System Design using Preemption Thresholds
The maturity of schedulabilty analysis techniquesfor fired-prioritypreemptive scheduling has enabled the consideration of timing issues at design time using a specification of the...
Manas Saksena, Yun Wang
TABLEAUX
2009
Springer
15 years 4 months ago
A Novel Architecture for Situation Awareness Systems
Situation Awareness (SA) is the problem of comprehending elements of an environment within a volume of time and space. It is a crucial factor in decision-making in dynamic environm...
Franz Baader, Andreas Bauer 0002, Peter Baumgartne...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 2 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
15 years 3 months ago
C Compiler Retargeting Based on Instruction Semantics Models
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compil...
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, ...