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» Timed circuits: a new paradigm for high-speed design
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ISPD
2009
ACM
126views Hardware» more  ISPD 2009»
15 years 8 months ago
A new algorithm for simultaneous gate sizing and threshold voltage assignment
Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven h...
Yifang Liu, Jiang Hu
ICIP
2002
IEEE
16 years 3 months ago
A window-based color quantization technique and its embedded implementation
A new color quantization (CQ) technique and its VLSI implementation is introduced. It is based on image split into windows and uses Kohonen Self Organized Neural Network Classifie...
Antonios Atsalakis, Nikos Papamarkos, Dimitrios So...
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
14 years 11 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
ICCD
2008
IEEE
204views Hardware» more  ICCD 2008»
15 years 10 months ago
Bridging the gap between nanomagnetic devices and circuits
— This paper looks at designing circuit elements that will be constructed with nanoscale magnets within the Quantum-dot Cellular Automata (QCA) computational paradigm. In magneti...
Michael T. Niemier, Xiaobo Sharon Hu, Aaron Dingle...
109
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SERP
2003
15 years 3 months ago
Experiences Developing an E-Whiteboard-Based Circuit Designer
E-whiteboards - large image display surfaces (LIDS) that support data input with pen-based sketching - have become more readily available in recent times. We describe a prototype ...
Ray Liu, Lisa Wong, John C. Grundy