395 search results - page 26 / 79 » Timed circuits: a new paradigm for high-speed design |
111
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GLVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
113
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DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
133
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ICCAD
2009
IEEE
14 years 11 months ago
2009
IEEE
Process and environmental variations continue to present significant challenges to designers of high-performance integrated circuits. In the past few years, while much research has...
145
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DAC
1997
ACM
15 years 6 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
106
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ISQED
2005
IEEE
15 years 7 months ago
2005
IEEE
The purpose of the paper is to introduce a new failure rate-based methodology for reliability simulation of deep submicron CMOS integrated circuits. Firstly, two of the state-of-t...