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» Timed circuits: a new paradigm for high-speed design
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DAC
2007
ACM
16 years 3 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
15 years 11 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
IPPS
2003
IEEE
15 years 7 months ago
Anonymous Publish/Subscribe in P2P Networks
One of the most important issues to deal with in peerto-peer networks is how to disseminate information. In this paper, we use a completely new approach to solving the information...
Ajoy Kumar Datta, Maria Gradinariu, Michel Raynal,...
ARITH
2001
IEEE
15 years 5 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
ISORC
2009
IEEE
15 years 8 months ago
Embedded JIT Compilation with CACAO on YARI
Java is one of the most popular programming languages for the development of portable workstation and server applications available today. Because of its clean design and typesafe...
Florian Brandner, Tommy Thorn, Martin Schoeberl