435 search results - page 48 / 87 » Timing analysis of asynchronous circuits using timed automat... |
63
Voted
ICCAD
2004
IEEE
15 years 9 months ago
2004
IEEE
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...
109
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
103
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FPL
2006
Springer
15 years 4 months ago
2006
Springer
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
106
Voted
ICCAD
1998
IEEE
15 years 4 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
111
Voted
JALC
2006
15 years 13 days ago
2006
Automated Web Service Composition has gained a significant momentum in facilitating fast and efficient formation of business-to-business collaborations where an important objectiv...