Sciweavers

6249 search results - page 232 / 1250
» Topological Informational Spaces
Sort
View
GLVLSI
2009
IEEE
164views VLSI» more  GLVLSI 2009»
15 years 7 months ago
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Da...
110
Voted
DAC
2003
ACM
15 years 6 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
TCAD
1998
107views more  TCAD 1998»
15 years 12 days ago
Optimizing dominant time constant in RC circuits
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
Lieven Vandenberghe, Stephen P. Boyd, Abbas A. El ...
115
Voted
INFOCOM
2010
IEEE
14 years 11 months ago
Tree-structured Data Regeneration in Distributed Storage Systems with Regenerating Codes
Abstract—Distributed storage systems provide large-scale reliable data storage by storing a certain degree of redundancy in a decentralized fashion on a group of storage nodes. T...
Jun Li, Shuang Yang, Xin Wang, Baochun Li
SMI
2005
IEEE
15 years 6 months ago
Mesh Editing with an Embedded Network of Curves
We propose a new topological data structure for representing a set of polygonal curves embedded in a meshed surface. In this embedding, the vertices of the curve do not necessaril...
Wan-Chiu Li, Bruno Lévy, Jean-Claude Paul