Sciweavers

159 search results - page 19 / 32
» Towards a Flow Analysis for Embedded System C Programs
Sort
View
LCTRTS
2010
Springer
15 years 4 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
89
Voted
DAC
2009
ACM
15 years 10 months ago
Optimal static WCET-aware scratchpad allocation of program code
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Heiko Falk, Jan C. Kleinsorge
90
Voted
ISSS
1999
IEEE
131views Hardware» more  ISSS 1999»
15 years 1 months ago
Compressed Code Execution on DSP Architectures
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...
Paulo Centoducatte, Ricardo Pannain, Guido Araujo
SIGCSE
2006
ACM
362views Education» more  SIGCSE 2006»
15 years 3 months ago
Chirp on crickets: teaching compilers using an embedded robot controller
Traditionally, the topics of compiler construction and language processing have been taught as an elective course in Computer Science curricula. As such, students may graduate wit...
Li Xu, Fred G. Martin
73
Voted
EMSOFT
2009
Springer
15 years 4 months ago
Probabilistic modeling of data cache behavior
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
Vinayak Puranik, Tulika Mitra, Y. N. Srikant