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MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
15 years 3 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
ICDAR
2009
IEEE
14 years 7 months ago
Comparative Study of Devnagari Handwritten Character Recognition Using Different Feature and Classifiers
In recent years research towards Indian handwritten character recognition is getting increasing attention. Many approaches have been proposed by the researchers towards handwritte...
Umapada Pal, Tetsushi Wakabayashi, Fumitaka Kimura
IEEEPACT
2009
IEEE
15 years 4 months ago
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
Abhishek Bhattacharjee, Margaret Martonosi
EUROPAR
2007
Springer
15 years 3 months ago
Program Behavior Characterization Through Advanced Kernel Recognition
Abstract. Understanding program behavior is at the foundation of program optimization. Techniques for automatic recognition of program constructs (from now on, computational kernel...
Manuel Arenaz, Juan Touriño, Ramon Doallo
SEMWEB
2009
Springer
15 years 2 months ago
A Decomposition-Based Approach to Optimizing Conjunctive Query Answering in OWL DL
Scalable query answering over Description Logic (DL) based ontologies plays an important role for the success of the Semantic Web. Towards tackling the scalability problem, we prop...
Jianfeng Du, Guilin Qi, Jeff Z. Pan, Yi-Dong Shen