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96
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PLDI
2005
ACM
15 years 4 months ago
Register allocation for software pipelined multi-dimensional loops
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
Hongbo Rong, Alban Douillet, Guang R. Gao
DAC
2009
ACM
15 years 12 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk
CC
1998
Springer
111views System Software» more  CC 1998»
14 years 10 months ago
Live Range Splitting in a Graph Coloring Register Allocator
Graph coloring is the dominant paradigm for global register allocation [8, 7, 4]. Coloring allocators use an interference graph, Z, to model conflicts that prevent two values from ...
Keith D. Cooper, L. Taylor Simpson
76
Voted
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
15 years 4 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
CC
2003
Springer
114views System Software» more  CC 2003»
15 years 4 months ago
Combined Code Motion and Register Allocation Using the Value State Dependence Graph
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
Neil Johnson, Alan Mycroft