A new method for predicting timing jitter caused by device noise in current-mode logic (CML) frequency dividers is presented. Device noise transformation into jitter is modeled as ...
Marko Aleksic, Nikola Nedovic, K. Wayne Current, V...
: Today, architecture and business processes are modeled separately. The only integration in architectural diagrams is done with Petri nets in the Fundamental Modeling Concept. Sin...
Oliver Kopp, Hanna Eberle, Tobias Unger, Frank Ley...
The LOGFLOW parallel Prolog system is similar to the recent parallel database systems concerning its dataflow execution model and its capability of running on othing architectures...
This paper explores the use of clickthrough data for query spelling correction. First, large amounts of query-correction pairs are derived by analyzing users' query reformula...
The concept of a stable model provided a declarative semantics for Prolog programs with negation as failure and became a starting point for the development of answer set programmi...