1640 search results - page 166 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
133
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DNA
2004
Springer
15 years 8 months ago
2004
Springer
DNA self-assembly is emerging as a key paradigm for nano-technology, nano-computation, and several related disciplines. In nature, DNA self-assembly is often equipped with explicit...
113
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NIPS
1993
15 years 4 months ago
1993
This paper describes the Q-routing algorithm for packet routing, in which a reinforcement learning module is embedded into each node of a switching network. Only local communicati...
141
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ROBOCUP
2001
Springer
15 years 7 months ago
2001
Springer
With the more sophisticated abilities of teams within the simulation league high level online functions become more and more attractive. Last year we proposed an approach to recogn...
131
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MEMOCODE
2003
IEEE
15 years 8 months ago
2003
IEEE
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
154
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ICPPW
2009
IEEE
15 years 1 months ago
2009
IEEE
Vehicular Delay-Tolerant Networks (VDTNs) are an application of the Delay-Tolerant Network (DTN) concept, where the movement of vehicles and their message relaying service is used ...