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» Transistor-Level Timing Analysis Using Embedded Simulation
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137
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QEST
2009
IEEE
15 years 9 months ago
Comparison of Two Output Models for the BMAP/MAP/1 Departure Process
—The departure process of a BMAP/MAP/1 queue can be approximated in different ways: as a Markovian arrival process (MAP) or as a matrix-exponential process (MEP). Both approximat...
Qi Zhang, Armin Heindl, Evgenia Smirni, Andreas St...
137
Voted
INFOCOM
2000
IEEE
15 years 7 months ago
Near Optimal Routing Lookups with Bounded Worst Case Performance
Abstract—The problem of route address lookup has received much attention recently and several algorithms and data structures for performing address lookups at high speeds have be...
Pankaj Gupta, Balaji Prabhakar, Stephen P. Boyd
120
Voted
FLAIRS
2006
15 years 3 months ago
Efficient Bids on Task Allocation for Multi-Robot Exploration
We propose a real time single item auction based task allocation method for the multi-robot exploration problem and investigate new bid evaluation strategies in this domain. In th...
Sanem Sariel, Tucker R. Balch
121
Voted
DATE
2009
IEEE
95views Hardware» more  DATE 2009»
15 years 9 months ago
Machine learning-based volume diagnosis
In this paper, a novel diagnosis method is proposed. The proposed technique uses machine learning techniques instead of traditional cause-effect and/or effect-cause analysis. The ...
Seongmoon Wang, Wenlong Wei
ICCAD
1998
IEEE
94views Hardware» more  ICCAD 1998»
15 years 6 months ago
Noise considerations in circuit optimization
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...