110 search results - page 4 / 22 » Two VLSI Design Advances in Arithmetic Coding |
DAC
1997
ACM
13 years 10 months ago
1997
ACM
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
GLVLSI
2005
IEEE
13 years 12 months ago
2005
IEEE
The instruction queue is a critical component and performance bottleneck in superscalar microprocessors. Conventional designs use physical register identifiers to wake up instruct...
CLEIEJ
2010
13 years 3 months ago
2010
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...
VLSID
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
ICASSP
2011
IEEE
12 years 10 months ago
2011
IEEE
To address the increasing demand for higher resolution and frame rates, processing speed (i.e. performance) and area cost need to be considered in the development of next generati...