110 search results - page 9 / 22 » Two VLSI Design Advances in Arithmetic Coding |
DFT
2008
IEEE
15 years 4 months ago
2008
IEEE
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuit...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
VLSID
2003
IEEE
15 years 3 months ago
2003
IEEE
— This paper reports a cryptosystem designed for security of embedded systems. It is based on the theory of Cellular Automata(CA). The Cellular Automata based Cryptosystem(CAC) e...
DASIP
2010
14 years 4 months ago
2010
This paper describes the implementation of the MPEG AVC CABAC entropy decoder using the RVC-CAL dataflow programming language. CABAC is the Context based Adaptive Binary Arithmeti...
FCCM
2006
IEEE
15 years 3 months ago
2006
IEEE
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...