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SAC
2009
ACM
15 years 10 months ago
Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
132
Voted
WWW
2005
ACM
16 years 4 months ago
Three-level caching for efficient query processing in large Web search engines
Large web search engines have to answer thousands of queries per second with interactive response times. Due to the sizes of the data sets involved, often in the range of multiple...
Xiaohui Long, Torsten Suel
128
Voted
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
15 years 10 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
245
Voted
ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
13 years 6 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
137
Voted
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
15 years 8 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...