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118
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WCET
2010
15 years 1 months ago
Toward Precise PLRU Cache Analysis
Schedulability analysis for hard real-time systems requires bounds on the execution times of its tasks. To obtain useful bounds in the presence of caches, cache analysis is mandat...
Daniel Grund, Jan Reineke
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
15 years 8 months ago
FPGA-based adaptive computing for correlated multi-stream processing
Abstract—In conventional static implementations for correlated streaming applications, computing resources may be inefficiently utilized since multiple stream processors may sup...
Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsc...
124
Voted
ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
15 years 5 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
110
Voted
DATE
2006
IEEE
93views Hardware» more  DATE 2006»
15 years 9 months ago
Restructuring field layouts for embedded memory systems
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo...
CLUSTER
2008
IEEE
15 years 10 months ago
Context-aware address translation for high performance SMP cluster system
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
Moon-Sang Lee, Joonwon Lee, Seungryoul Maeng