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DAC
2005
ACM
16 years 4 months ago
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
CASES
2008
ACM
15 years 5 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...
128
Voted
COOPIS
1998
IEEE
15 years 8 months ago
A Dynamic and Adaptive Cache Retrieval Scheme for Mobile Computing
Recent advances in wireless technologies have made the mobile computing a reality. In order to provide services of good quality to mobile users and improve the system performance,...
Wen-Chih Peng, Ming-Syan Chen
124
Voted
HICSS
1994
IEEE
152views Biometrics» more  HICSS 1994»
15 years 7 months ago
Simple COMA Node Implementations
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
Erik Hagersten, Ashley Saulsbury, Anders Landin
131
Voted
IEEEPACT
2008
IEEE
15 years 10 months ago
Distributed cooperative caching
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
Enric Herrero, José González, Ramon ...