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» Uncertainty-aware circuit optimization
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DAC
1995
ACM
15 years 1 months ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks
ICCAD
1995
IEEE
96views Hardware» more  ICCAD 1995»
15 years 1 months ago
Delay optimal partitioning targeting low power VLSI circuits
Hirendu Vaishnav, Massoud Pedram
IEICET
2007
50views more  IEICET 2007»
14 years 9 months ago
Optimal Euler Circuit of Maximum Contiguous Cost
Yu Qiao, Makoto Yasuhara
DAC
2010
ACM
15 years 1 months ago
Reducing the number of lines in reversible circuits
Reversible logic became a promising alternative to traditional circuits because of its applications e.g. in low-power design and quantum computation. As a result, design of revers...
Robert Wille, Mathias Soeken, Rolf Drechsler
GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
15 years 1 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan