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» Uncertainty-aware circuit optimization
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ICCAD
2008
IEEE
223views Hardware» more  ICCAD 2008»
15 years 8 months ago
Decoupling capacitance allocation for timing with statistical noise model and timing analysis
Abstract— This paper presents an allocation method of decoupling capacitance that explicitly considers timing. We have found and focused that decap does not necessarily improve a...
Takashi Enami, Masanori Hashimoto, Takashi Sato
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
15 years 8 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
ISLPED
2009
ACM
97views Hardware» more  ISLPED 2009»
15 years 5 months ago
A high-performance low-power nanophotonic on-chip network
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
Zheng Li, Jie Wu, Li Shang, Alan R. Mickelson, Man...
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DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 5 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
15 years 5 months ago
An Experimental Analysis of SEU Sensitiveness on System Knowledge-based Hardening Techniques
Logic Soft Errors caused by radiation are a major concern when working with circuits that need to operate in harsh environments, such as space or avionics applications, where soft ...
Oscar Ruano, Pilar Reyes, Juan Antonio Maestro, Lu...