1217 search results - page 214 / 244 » Uncertainty-aware circuit optimization |
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ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
ISPD
2005
ACM
15 years 3 months ago
2005
ACM
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
GECCO
2004
Springer
15 years 2 months ago
2004
Springer
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
LCN
2003
IEEE
15 years 2 months ago
2003
IEEE
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...