1217 search results - page 225 / 244 » Uncertainty-aware circuit optimization |
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
DAC
2009
ACM
15 years 4 months ago
2009
ACM
This paper describes an automatic methodology for optimizing sample point selection for using in the framework of model order reduction (MOR). The procedure, based on the maximiza...
FPGA
2009
ACM
15 years 4 months ago
2009
ACM
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing significant loss on circuit performance and lifetime, has become a critical challenge for temporal re...
INFOCOM
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Mobile TV networks have received significant attention from the industry and academia, as they have already been deployed in several countries and their expected market...