Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
We study the circuit complexity of the powering function, defined as POWm(Z) = Zm for an n-bit integer input Z and an integer exponent m poly(n). Let LTd denote the class of func...
— There are many kinds of optimization techniques for designing high-performance RF circuits. In this paper, we propose a new frequency-domain Spice-oriented optimization algorit...