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MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
14 years 11 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
DAC
1996
ACM
15 years 3 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
ICCAD
1999
IEEE
75views Hardware» more  ICCAD 1999»
15 years 3 months ago
Functional timing optimization
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
Alexander Saldanha
IPL
2007
111views more  IPL 2007»
14 years 11 months ago
Powering requires threshold depth 3
We study the circuit complexity of the powering function, defined as POWm(Z) = Zm for an n-bit integer input Z and an integer exponent m poly(n). Let LTd denote the class of func...
Alexander A. Sherstov
ISCAS
2006
IEEE
105views Hardware» more  ISCAS 2006»
15 years 5 months ago
A new Spice-oriented frequency-domain optimization technique
— There are many kinds of optimization techniques for designing high-performance RF circuits. In this paper, we propose a new frequency-domain Spice-oriented optimization algorit...
Masayoshi Oda, Yoshihiro Yamagami, Yoshifumi Nishi...