1217 search results - page 89 / 244 » Uncertainty-aware circuit optimization |
DATE
2008
IEEE
15 years 5 months ago
2008
IEEE
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...
DATE
2007
IEEE
15 years 5 months ago
2007
IEEE
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
GLVLSI
2009
IEEE
15 years 6 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
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SLIP
2009
ACM
15 years 5 months ago
2009
ACM
Individual dies in 3D integrated circuits are connected using throughsilicon-vias (TSVs). TSVs not only increase manufacturing cost, but also incur silicon area, delay, and power ...
IRI
2007
IEEE
15 years 5 months ago
2007
IEEE
The paper presents a technique for the design of digital systems on the basis of reusable hardware templates, which are circuits with modifiable functionality that might be custom...