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» Understanding transactional memory performance
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FCCM
2008
IEEE
114views VLSI» more  FCCM 2008»
15 years 3 months ago
Scaling Soft Processor Systems
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...
CHI
2006
ACM
15 years 9 months ago
The paradox of the assisted user: guidance can be counterproductive
This paper investigates the influence of interface styles on problem solving performance. It is often assumed that performance on problem solving tasks improves when users are ass...
Christof van Nimwegen, Daniel D. Burgos, Herre van...
IPPS
2008
IEEE
15 years 3 months ago
Impact of multicores on large-scale molecular dynamics simulations
Processing nodes of the Cray XT and IBM Blue Gene Massively Parallel Processing (MPP) systems are composed of multiple execution units, sharing memory and network subsystems. Thes...
Sadaf R. Alam, Pratul K. Agarwal, Scott S. Hampton...
ASPDAC
2001
ACM
185views Hardware» more  ASPDAC 2001»
15 years 1 months ago
Power optimization and management in embedded systems
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
Massoud Pedram
VEE
2005
ACM
218views Virtualization» more  VEE 2005»
15 years 3 months ago
The pauseless GC algorithm
Modern transactional response-time sensitive applications have run into practical limits on the size of garbage collected heaps. The heap can only grow until GC pauses exceed the ...
Cliff Click, Gil Tene, Michael Wolf