65 search results - page 11 / 13 » Unified decoder architecture for LDPC turbo codes |
TIT
2002
13 years 5 months ago
2002
We develop methods for analyzing and constructing combined modulation/error-correctiong codes (ECC codes), in particular codes that employ some form of reversed concatenation and w...
DATE
2000
IEEE
13 years 10 months ago
2000
IEEE
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
ASYNC
2007
IEEE
14 years 18 days ago
2007
IEEE
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
ISCAS
2006
IEEE
14 years 8 days ago
2006
IEEE
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
ICC
2008
IEEE
14 years 21 days ago
2008
IEEE
Abstract— In this paper, a simple modulation code called symbol insertion for band-limited single-carrier systems is proposed. This code can reduce the peak-to-average power rati...