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VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
16 years 2 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
EWSN
2009
Springer
15 years 8 months ago
SCOPES: Smart Cameras Object Position Estimation System
In this paper we present SCOPES, a distributed Smart Camera Object Position Estimation sensor network System that provides maps of distribution of people in indoors environments. ...
Ankur Kamthe, Lun Jiang, Matthew Dudys, Alberto Ce...
HPDC
2007
IEEE
15 years 8 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
HICSS
2002
IEEE
127views Biometrics» more  HICSS 2002»
15 years 6 months ago
Weaving Community with Community Fibre: Community Informatics and the Broadband Revolution
Unexpectedly, the widespread availability of very very high speed (Broadband) bandwidth into communities and within large centres has become not only a long-term possibility but a...
Michael Gurstein
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
15 years 6 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko