2065 search results - page 29 / 413 » Using Architectural Models at Runtime: Research Challenges |
114
click to vote
ISCA
2007
IEEE
15 years 10 months ago
2007
IEEE
Transient faults due to particle strikes are a key challenge in microprocessor design. Driven by exponentially increasing transistor counts, per-chip faults are a growing burden. ...
143
click to vote
DAC
2006
ACM
16 years 4 months ago
2006
ACM
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
107
click to vote
IEEEHPCS
2010
15 years 2 months ago
2010
In the past few years, research in the domain of networkon-chip has been concentrated on application-specific approaches. These approaches are design-time parameterized approache...
141
click to vote
VLSID
2006
IEEE
15 years 9 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
146
click to vote
OOPSLA
2004
Springer
15 years 9 months ago
2004
Springer
It is difficult to write programs that behave correctly in the presence of run-time errors. Existing programming language features often provide poor support for executing clean-u...