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ISCA
1989
IEEE
109views Hardware» more  ISCA 1989»
15 years 10 months ago
Improving Performance of Small On-Chip Instruction Caches
Most current single-chip processors employ an on-chip instruction cache to improve performance. A miss in this insk-uction cache will cause an external memory reference which must...
Matthew K. Farrens, Andrew R. Pleszkun
APDC
1997
15 years 7 months ago
An Improved Parallel Algorithm for Delaunay Triangulation on Distributed Memory Parallel Computers
Delaunaytriangulationhas beenmuchusedin suchapplicationsas volumerendering, shape representation, terrain modeling and so on. The main disadvantage of Delaunay triangulationis lar...
Sangyoon Lee, Chan-Ik Park, Chan-Mo Park
ENTCS
2008
101views more  ENTCS 2008»
15 years 6 months ago
Improving Fault-based Conformance Testing
Fault-based conformance testing is a conformance testing strategy that relies on specific fault models. Previously, this mutation testing technique has been applied to protocol spe...
Bernhard K. Aichernig, Martin Weiglhofer, Franz Wo...
JCST
2007
97views more  JCST 2007»
15 years 6 months ago
Improved Collision Attack on Hash Function MD5
In this paper, we present a fast attack algorithm to find two-block collision of hash function MD5. The algorithm is based on the two-block collision differential path of MD5 that ...
Jie Liang, Xue-Jia Lai
LION
2007
Springer
139views Optimization» more  LION 2007»
16 years 5 days ago
Evolution of Fitness Functions to Improve Heuristic Performance
In this paper we introduce the variable fitness function which can be used to control the search direction of any search based optimisation heuristic where more than one objective ...
Stephen Remde, Peter I. Cowling, Keshav P. Dahal, ...